1. Field of the Invention
The present general inventive concept relates to moving picture encoding, and more particularly, to a variable length coding apparatus and a variable length coding method.
2. Description of the Related Art
In order to encode moving pictures with high picture quality, a moving picture encoding apparatus operating at a high speed is needed. In order to operate the moving picture encoding apparatus, a discrete cosine transform (DCT) apparatus, a quantization/dequantization apparatus, and a variable length coding (VLC) coding apparatus are indispensable. In order to operate the DCT apparatus, the apparatus is usually designed to be able to process two data items at each clock cycle.
FIG. 1 is a schematic block diagram of a conventional moving picture encoding apparatus.
Referring to FIG. 1, the moving picture encoding apparatus comprises a DCT/quantization unit 110, a run length coding (RLC) unit 120, a variable length code generation unit 130, a VLC table 140, a buffer 150, and a bitstream packing unit 160. The encoding apparatus performs DCT/quantization, RLC, and VLC in units of 8×8 blocks.
The DCT/quantization unit 110 performs DCT and quantization in units of 8×8 data blocks, and the RLC unit 120 performs the RLC of data output from the DCT/quantization unit 110.
A variable length coding (VLC) apparatus 100 for performing the VLC comprises the variable length code generation unit 130, the VLC table 140, the buffer 150, and the bitstream packing unit 160.
The variable length code generation unit 130 refers to the VLC table 140 while taking output data of the RLC unit 120 as input symbols, and then outputs two data items, each formed with a code value and a code length corresponding to each input symbol, to the buffer 150.
The buffer 150 stores the data items output from the variable length code generation unit 130 and then transfers the data items to the bitstream packing unit 160.
The bitstream packing unit 160 generates a final bitstream and in doing so, reads the code value and code length information of each symbol from the buffer 150 and generates a continuous bitstream. Information for producing a bitstream includes a motion vector, a code mode, and a variety of header information, which are not shown in FIG. 1.
FIG. 2 is a flowchart of the steps performed by a variable length coding process of the conventional moving picture encoding apparatus of FIG. 1.
Referring to FIGS. 1 and 2, first, the DCT/quantization unit 110 receives 2N-bit data 30 formed with N-bit data 0 10 and N-bit data 1 20 at each clock cycle, performs the DCT and quantization for the data in units of 8×8 blocks, and then outputs two data items of the processed resulting data to the RLC unit 120 at each clock cycle in operation 210. Accordingly, the DCT/quantization unit 110 processes 64 data items for 32 clock cycles when a data item is an 8×8 block.
Next, the RLC unit 120 receives two data items of the quantized data at each clock cycle and performs run length encoding in operation 220, and outputs two data items, each formed with the length of continuous 0's and a level value. The output of the RLC unit 120 varies according to images and if there are no continuous 0's, 64 data items are output for 32 clock cycles when a data item is an 8×8 block. However, in an ordinary image, the output of the DCT/quantization unit 110 has many continuous 0's and therefore the RLC unit 120 outputs much less data items than 64 for 32 clock cycles when a data item is an 8×8 block.
The variable length code generation unit 130 receives and outputs two data items at each clock cycle in operation 230. That is, the variable length code generation unit 130 refers to the VLC table 140 while taking the output data of the RLC unit 120 as input symbols, and then outputs the two data items, each formed with a code value and a code length corresponding to each input symbol. That is, the two data items are output at each clock cycle.
The two data items output from the variable length code generation unit 130 at each clock cycle are stored in the buffer 150 in operation 240.
Then, the bitstream packing unit 160 receives one of the data items stored in the buffer 150 at each clock cycle and outputs a continuous bitstream in operation 250. That is, since the bitstream packing unit 160 can process a maximum of one input data item at each clock cycle, and the data output rate of the variable length code generation unit 130 can be twice as high as the data input rate of the bitstream packing unit 160 at a maximum, the buffer 150 is placed between the variable length code generation unit 130 and the bitstream packing unit 160 as shown in FIG. 1.
It is a problem that the output rate of the variable length code generation unit 130 is twice as high as the input rate of the bitstream packing unit 160 in the worst case. As the quality of pictures being encoded is higher, the output rate of the variable code generation unit 130 approaches twice the input rate of the bitstream packing unit 160. In such cases, processing two data items at each clock cycle before the bitstream packing unit 160 for high-speed processing is of no use. That is, when a data item is an 8×8 blocks, though processing data items before the front end of the bitstream packing unit 160 is finished in 32 clock cycles, 64 clock cycles are needed in the worst case in the bitstream packing unit 160 and a situation where data items are idling before the front end of the bitstream packing unit 160 for 32 clock cycles takes place.